Implementation of a SoC by Using lowRISC Architecture on an FPGA for Image Filtering Applications

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dc.contributor.authorAkcay, Latif
dc.contributor.authorSurer, Bartu
dc.contributor.authorYalcin, Berna Ors
dc.date.accessioned2024-10-04T18:58:42Z
dc.date.available2024-10-04T18:58:42Z
dc.date.issued2022
dc.departmentBayburt Üniversitesien_US
dc.description30th Signal Processing and Communications Applications Conference, SIU 2022 -- 15 May 2022 through 18 May 2022 -- Safranbolu -- 182415en_US
dc.description.abstractIn this study, it is aimed to implement the low-RISC system-on-chip, which is based on the Rocket processor created with the RISC-V instruction set architecture developed by Berkeley University, on FPGA and to run image processing algorithms on this system. While making this implementation, the main target is a system that is very simple, consumes low power, and can be quickly redirected to other purposes. Therefore, it is based on the effective evaluation of the existing system without using any extra customized accelerators. Thus, a free, open source, and powerful enough platform for many embedded system applications is proposed to the designers. For this purpose, a lane detection application designed with standard C libraries such as Gaussian blur filter, Sobel operation filter and other elements, which are widely used in image processing applications, is run with embedded Linux operating system and the results are shared. © 2022 IEEE.en_US
dc.identifier.doi10.1109/SIU55565.2022.9864960
dc.identifier.isbn978-166545092-8
dc.identifier.scopus2-s2.0-85138749542en_US
dc.identifier.scopusqualityN/Aen_US
dc.identifier.urihttps://doi.org/10.1109/SIU55565.2022.9864960
dc.identifier.urihttp://hdl.handle.net/20.500.12403/3982
dc.indekslendigikaynakScopusen_US
dc.language.isotren_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.relation.ispartof2022 30th Signal Processing and Communications Applications Conference, SIU 2022en_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectimage processingen_US
dc.subjectlane detectionen_US
dc.subjectlowRISCen_US
dc.subjectRISC-Ven_US
dc.subjectsystem on chipen_US
dc.titleImplementation of a SoC by Using lowRISC Architecture on an FPGA for Image Filtering Applicationsen_US
dc.title.alternativeGörüntü Filtreleme Uygulamalari için lowRISC Mimarisini Kullanan Kirmik Üstü Sistem Tasarimi ve FPGA Üzerinde Gerçeklenmesien_US
dc.typeConference Objecten_US

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